3D Heterogeneous Integration Powers New DARPA Fab

A 1980s-era semiconductor fab in Austin, Texas, is getting a makeover. The Texas Institute for Electronics (TIE), as it’s called now, is tooling up to become the only advanced packaging plant in the world that is dedicated to 3D heterogenous integration (3DHI)—the stacking of chips made of multiple materials, both silicon and non-silicon.

The fab is the infrastructure behind DARPA’s Next-Generation Microelectronics Manufacturing (NGMM) program. “NGMM is focused on a revolution in microelectronics through 3D heterogeneous integration,” said Michael Holmes, managing director of the program.

Stacking two or more silicon chips inside the same package makes them act as if they are all one integrated circuit. It already powers some of the most advanced processors in the world. But DARPA predicts silicon-on-silicon stacking will result in no more than a 30-fold boost in performance over what’s possible with 2D integration. By contrast, doing it with a mix of materials—gallium nitride, silicon carbide, and other semiconductors—could deliver a 100-fold boost, Holmes told engineers and other interested parties at the program’s unofficial coming out party, the NGMM Summit, late last month.

The new fab will make sure these unusual stacked chips are prototyped and manufactured in the United States. Startups, and there were many at the launch event, are looking for a place to prototype and begin manufacturing ideas that are too weird for anywhere else—and hopefully bypassing the lab-to-fab valley of death that claims many hardware startups.

The state of Texas is contributing $552 million to stand up the fab and its programs, with DARPA contributing the remaining $840 million. After NGMM’s five-year mission is complete, the fab is expected to be a self-sustaining business. “We are, frankly, a startup,” said TIE CEO Dwayne LaBrake. “We have more runway than a typical startup, but we have to stand on our own.”

Starting up a 3DHI Fab

Getting to that point will take a lot of work, but the TIE foundry is off to a quick start. On a tour of the facility, IEEE Spectrum saw multiple chip manufacturing and testing tools in various states of installation and met several engineers and technicians who had started within the last three months. TIE expects all the fab’s tools to be in place in the first quarter of 2026.

Just as important as the tools themselves is the ability of foundry customers to use them in a predictable manufacturing process. That’s something that is particularly difficult to develop, TIE officials explained. At the most basic level, non-silicon wafers are often not the same size as each other. And they have different mechanical properties, meaning they expand and contract with temperature at different rates. Yet much of the fab’s work will be linking these chips together with micrometer precision.

The first phase of getting that done is the development of what are called a process design kit and an assembly design kit. The former provides the rules that constrain semiconductor design at the fab. The latter, the assembly design kit, is the real heart of things, because it gives the rules for the 3D assembly and other advanced packaging.

Next, TIE will refine those by way of three 3DHI projects, which NGMM is calling exemplars. These are a phased-array radar, an infrared imager called a focal plane array, and a compact power converter. Piloting those through production “gives us an initial roadmap… an on-ramp into tremendous innovation across a broader application space,” said Holmes.

These three very different products are emblematic of how the fab will have to operate once it’s up and running. Executives described it as a “high-mix, low-volume” foundry, meaning it’s going to have to be good at doing many different things, but it’s not going to make a lot of any one thing.

This is the opposite of most silicon foundries. A high-volume silicon foundry gets to run lots of similar test wafers through its process to work out the bugs. But TIE can’t do that, so instead it’s relying on AI—developed by Austin startup Sandbox Semiconductor—to help predict the outcome of tweaks to its processes.

Along the way, NGMM will provide a number of research opportunities. “What we have with NGMM is a very rare opportunity,” said Ted Moise, a professor at UT Dallas and an IEEE Fellow. With NGMM, universities are planning to work on new thermal conductivity films, microfluidic cooling technology, understanding failure mechanisms in complex packages, and more.

“NGMM is a weird program for DARPA,” admitted Whitney Mason, director of the agency’s Microsystems Technology Office. “It’s not our habit to stand up facilities that do manufacturing.”

But “Keep Austin Weird” is the city’s unofficial motto, so maybe NGMM and TIE will prove a perfect fit.